Draft page

This page is an outline. It describes what will be covered and is not yet complete technical documentation.

Reasoning about kernel performance requires an accurate model of the hardware: how work is scheduled onto execution units, and how the memory hierarchy behaves under different access patterns.

This page covers the architectural fundamentals that inference performance depends on.

What you will learn

  • How GPU work is organised into threads, warps and blocks.
  • The memory hierarchy and the cost of each level.
  • Why coalesced memory access matters so much.
  • How to reason about occupancy and arithmetic intensity.

This page is an outline. The subsections below are the planned structure; they are filled in as the handbook is written.

Execution model

Draft

The memory hierarchy

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Coalescing and access patterns

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Occupancy

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Arithmetic intensity and the roofline model

Draft

Specialised matrix units

Draft